AMD Advances OpenSIL Firmware for Next-Generation EPYC and AM5 Platforms
AMD continues to make significant strides in open-source firmware development with its openSIL (Open Silicon Initialization Library) project. At the OCP Global Summit last autumn, Raj Kapoor, AMD’s lead firmware architect, shared updates on the company’s roadmap. Notably, AMD plans to release openSIL source code for its upcoming sixth-generation "Zen 6" EPYC "Venice" CPUs in 2026. This move signals a transition away from the long-standing AGESA firmware, as openSIL is set to become the new standard for silicon initialization across AMD platforms.
As of mid-2023, openSIL support has been introduced for a segment of AMD’s "Zen 5" lineup, specifically the EPYC 9005 "Turin" server processors. This marks a pivotal step in bringing open-source firmware to enterprise-grade hardware, offering greater transparency and flexibility for data center deployments.
Expanding OpenSIL and Coreboot to Consumer AM5 Platforms
Recent developments highlight efforts to extend openSIL and Coreboot support to AMD’s consumer AM5 platforms. The Polish open-source consulting firm 3mdeb, known for its innovative firmware projects, recently documented their progress in enabling AMD AM5 "Phoenix" support within Coreboot. Backed by NLnet Foundation funding, 3mdeb previously worked on porting openSIL and Coreboot to the Gigabyte MZ33-AR1 server motherboard. Their latest experiments focus on the MSI PRO B850-P, a consumer-grade AM5 mainboard.
The team encountered several technical challenges during the porting process. One notable issue involves parsing combo firmware images for AM5 desktop platforms. Unlike server images, which typically have a dedicated Platform Security Processor (PSP) directory for each CPU family, desktop images often support multiple CPU families within a single PSP directory. This complexity requires careful differentiation between directories and accurate identification of supported CPUs.
Despite these hurdles, 3mdeb has achieved initial boot functionality on the MSI B850-P Pro. The next milestone is to implement basic support for distinguishing between mobile and desktop "Phoenix" CPUs within Coreboot. This foundational work will help address the architectural differences between mobile and desktop Phoenix SoCs and APUs.
It’s important to note that the current state of the "Phoenix" openSIL project remains at the proof-of-concept stage and is not intended for production environments. 3mdeb’s firmware engineer, Michał Żygowski, advises external testers to await future releases as development continues.
Demonstrating AMD SEV-SNP Attestation on Open Firmware
In a related demonstration, 3mdeb showcased SEV-SNP (Secure Encrypted Virtualization – Secure Nested Paging) guest attestation on the Gigabyte MZ33-AR1 server motherboard. The test involved running Coreboot with AMD openSIL to initialize an EPYC Turin CPU, successfully verifying the operation of AMD’s advanced SEV-SNP security feature. This experiment underscores the potential of open-source firmware to support cutting-edge security technologies in both server and, eventually, consumer platforms.
